US 12,414,485 B2
Method for manufacturing an OxRAM-type resistive memory cell and associated OxRAM-type memory cell
Gabriel Molas, Grenoble (FR); Anthonin Verdy, Grenoble (FR); Jean-Baptiste Dory, Grenoble (FR); and Jean-François Nodin, Grenoble (FR)
Assigned to COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, Paris (FR); and WEEBIT NANO LTD, Hod Hasharon (IL)
Filed by COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, Paris (FR); and WEEBIT NANO LTD, Hod Hasharon (IL)
Filed on Dec. 18, 2024, as Appl. No. 18/985,575.
Claims priority of application No. 2314400 (FR), filed on Dec. 18, 2023.
Prior Publication US 2025/0204285 A1, Jun. 19, 2025
Int. Cl. H10N 70/20 (2023.01); H10B 63/00 (2023.01); H10N 70/00 (2023.01)
CPC H10N 70/841 (2023.02) [H10B 63/00 (2023.02); H10N 70/011 (2023.02); H10N 70/24 (2023.02); H10N 70/8833 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A method for manufacturing an OxRAM-type resistive memory cell, comprising:
forming a titanium nitride lower electrode,
firstly implanting silicon atoms into the lower electrode with a first implantation dose of silicon and a first implantation acceleration voltage, said first implantation dose of silicon being strictly positive and strictly lower than 0.7×1014 cm−2
secondly implanting silicon atoms into the lower electrode with a second implantation dose of silicon and a second implantation acceleration voltage strictly greater than the first implantation acceleration voltage, said second implantation dose of silicon being strictly positive and strictly lower than 0.6·1014 cm−2
the first and second acceleration voltages being selected to have an implantation profile following the first and second implantations having a maximum silicon concentration at a depth of between 1 and 3 nm from the upper surface of the lower electrode,
depositing an active layer onto the lower electrode implanted, and
depositing an upper electrode onto the active layer.