US 12,414,341 B2
Method of fabricating a semiconductor structure
Tao Long, Shanghai (CN); Pin-Hao Huang, Taipei (TW); and Ze Rui Chen, Milpitas, CA (US)
Assigned to Diodes Incorporated, Plano, TX (US)
Filed by Diodes Incorporated, Plano, TX (US)
Filed on Dec. 11, 2023, as Appl. No. 18/534,917.
Application 18/534,917 is a division of application No. 17/690,842, filed on Mar. 9, 2022, granted, now 12,002,851.
Claims priority of application No. 202210102438.5 (CN), filed on Jan. 27, 2022.
Prior Publication US 2024/0113167 A1, Apr. 4, 2024
Int. Cl. H01L 29/06 (2006.01); H01L 29/04 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/0684 (2013.01) [H01L 29/04 (2013.01); H01L 29/66121 (2013.01)] 4 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor structure, comprising:
providing a substrate having a first conductivity type, and having a first surface and a second surface opposite to the first surface;
diffusing from the first surface of the substrate into the substrate to form a first diffusion layer having the first conductivity type;
diffusing from the second surface of the substrate into the substrate to form a second diffusion layer having a second conductivity type;
forming a plurality of diffusion regions having the first conductivity type in the second diffusion layer, wherein a first conductivity type impurity concentration of the plurality of diffusion regions is higher than a second conductivity type impurity concentration of the second diffusion layer;
forming a first electrode layer on the first diffusion layer;
forming a second electrode layer on the second diffusion layer, wherein the second electrode layer is in contact with the plurality of diffusion regions; and
coupling the second diffusion layer to the plurality of diffusion regions through the second electrode layer, wherein, the substrate is between the first electrode layer and the second electrode layer.