US 12,414,319 B2
Semiconductor device, semiconductor module, and wireless communication apparatus
Kazuki Kishida, Kanagawa (JP); and Katsuhiko Takeuchi, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Appl. No. 18/005,058
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
PCT Filed Jun. 18, 2021, PCT No. PCT/JP2021/023166
§ 371(c)(1), (2) Date Jan. 11, 2023,
PCT Pub. No. WO2022/019017, PCT Pub. Date Jan. 27, 2022.
Claims priority of application No. 2020-123446 (JP), filed on Jul. 20, 2020.
Prior Publication US 2023/0261099 A1, Aug. 17, 2023
Int. Cl. H10D 30/47 (2025.01); H10D 30/01 (2025.01); H10D 62/17 (2025.01); H10D 62/85 (2025.01); H10D 64/27 (2025.01)
CPC H10D 30/475 (2025.01) [H10D 30/015 (2025.01); H10D 62/307 (2025.01); H10D 64/514 (2025.01); H10D 62/8503 (2025.01)] 13 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a channel layer including a first nitride semiconductor;
a barrier layer including a second nitride semiconductor, the barrier layer being provided on the channel layer;
a source electrode and a drain electrode that are provided above the barrier layer;
a gate electrode that is provided above the barrier layer between the source electrode and the drain electrode;
a side surface opening region that is provided on at least one of side surfaces of the gate electrode between the source electrode or the drain electrode and the gate electrode; and
a low-Ns region that is provided in the channel layer in correspondence with a planar region provided with the gate electrode and the side surface opening region, the low-Ns region having lower carrier density than carrier density of another region of the channel layer.