| CPC H10B 43/40 (2023.02) [H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H10B 43/27 (2023.02); H10B 43/35 (2023.02)] | 20 Claims |

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1. A semiconductor device, comprising:
a lower structure including a semiconductor substrate, a circuit device on the semiconductor substrate, a circuit interconnection structure including connection patterns electrically connected to the circuit device and at different height levels, and a lower insulating structure covering the circuit device and the circuit interconnection structure on the semiconductor substrate;
an upper structure on the lower structure and including wordlines stacked and spaced apart from each other in a vertical direction, a vertical memory structure penetrating through the wordlines, and a bitline electrically connected to the vertical memory structure on the vertical memory structure; and
a contact plug forming at least a portion of a signal path electrically connecting at least one of the bitline and the wordlines and at least one of the connection patterns to each other, wherein:
the connection patterns include an upper connection pattern contacting the contact plug;
the lower insulating structure includes a first insulating portion on a side surface of the upper connection pattern and a second insulating portion on the first insulating portion and on the upper connection pattern;
the contact plug penetrates through the second insulating portion and contacts the upper connection pattern;
the first insulating portion includes a first lower layer and a second lower layer on the first lower layer, the second lower layer having a thickness smaller than a thickness of the first lower layer;
the second insulating portion includes:
a first upper layer contacting the second lower layer and covering at least a portion of an upper surface of the upper connection pattern, and
a second upper layer on the first upper layer, the second upper layer having a thickness greater than a thickness of the first upper layer; and
a material of the second lower layer and the first upper layer is different from a material of the first lower layer and the second upper layer.
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