US 12,414,290 B2
Integrated circuit device
Jieun Lee, Suwon-si (KR); Dongho Yu, Suwon-si (KR); Deoksung Hwang, Suwon-si (KR); Gisung Kim, Seoul (KR); and Seungyoung Seo, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Dec. 19, 2022, as Appl. No. 18/084,190.
Claims priority of application No. 10-2021-0183128 (KR), filed on Dec. 20, 2021.
Prior Publication US 2023/0200054 A1, Jun. 22, 2023
Int. Cl. H10B 12/00 (2023.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H10B 12/315 (2023.02) [H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H10B 12/482 (2023.02)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a substrate having an active region;
a conductive landing pad at a first vertical level above the substrate and connected to the active region;
a capacitor including a lower electrode at a second vertical level higher than the first vertical level above the substrate; and
a conductive multifunction plug comprising:
an extended landing pad portion at a third vertical level between the first vertical level and the second vertical level and contacting the conductive landing pad, and
an extended lower electrode portion integrally connected to the extended landing pad portion and contacting the lower electrode,
wherein the capacitor further includes a dielectric layer covering a surface of the lower electrode and the extended lower electrode portion of the conductive multifunction plug.