| CPC H04W 68/02 (2013.01) | 12 Claims |

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1. A device comprising:
at least one transceiver chains;
wherein the at least one transceiver chains have a plurality of connections to at least one wireless communication systems,
wherein the device is connected to at least one network entities using the plurality of connections,
a processor circuit; and
a memory circuit, wherein the memory is arranged to store instructions for the processor circuit,
wherein the processor circuit is arranged to perform at least one operations on the plurality of connections at operation occasions,
wherein the processor circuit is arranged to transmit or receive on a first connection of the plurality of connections,
wherein the processor circuit is arranged to not transmit or receive on a second connection of the plurality of connections, and
wherein the processor circuit is arranged to tune away from a first operation of the at least one operations on the first connection to perform a second operation on the second connection of the plurality of connections,
wherein the processor circuit is arranged to signal a tune away signal to the at least one network entities,
wherein the processor circuit is arranged to inform the at least one network entities of the first connection that the tune away duration is longer than a tune away duration in response indication that the second operation takes more time then permitted,
wherein the tune away duration is defined by the tune away signal.
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