US 12,413,383 B1
Low-power multi-variable feedback control loop
David Edgar Castle, Riverside, CA (US)
Assigned to Synopsys, Inc., Mountain View, CA (US)
Filed by Synopsys, Inc., Mountain View, CA (US)
Filed on Nov. 30, 2022, as Appl. No. 18/072,590.
Int. Cl. H04L 7/033 (2006.01); H04L 1/00 (2006.01)
CPC H04L 7/033 (2013.01) [H04L 1/0083 (2013.01); H04L 7/0331 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A system comprising:
a receiver configured to receive first data of a first data format at an input frequency;
a transmitter configured to transmit second data of a second data format at a transmission frequency; and
a format converter, coupled between the receiver and the transmitter, to convert the first data to the second data, wherein the format converter includes:
a phase-locked loop (PLL) that provides an output frequency based on a first frequency multiplier value; and
a control loop coupled to the PLL, wherein the control loop converts, using at least one of one-bit floating-point converters, the output frequency of the PLL to the transmission frequency,
wherein the transmission frequency is based on a second frequency multiplier value of the control loop, and
wherein the at least one of the one-bit floating-point converters generates a one-bit floating-point number from an integer value of the first data to convert the first frequency multiplier value into the second frequency multiplier value.