US 12,413,232 B2
Multi-purpose interface for configuration data and user fabric data
Kevin Clark, San Jose, CA (US); Scott J. Weber, Piedmont, CA (US); James Ball, San Jose, CA (US); Ravi Prakash Gutala, San Jose, CA (US); and Aravind Raghavendra Dasu, Milpitas, CA (US)
Assigned to Altera Corporation, San Jose, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Aug. 22, 2022, as Appl. No. 17/893,004.
Application 17/893,004 is a continuation of application No. 17/094,612, filed on Nov. 10, 2020, granted, now 11,424,744.
Application 17/094,612 is a continuation of application No. 16/235,984, filed on Dec. 28, 2018, granted, now 10,833,679, issued on Nov. 10, 2020.
Prior Publication US 2023/0056118 A1, Feb. 23, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H03K 19/1776 (2020.01); G11C 5/02 (2006.01); G11C 7/10 (2006.01); H01L 25/065 (2023.01)
CPC H03K 19/1776 (2013.01) [G11C 5/025 (2013.01); G11C 7/1078 (2013.01); H01L 25/0657 (2013.01); H01L 2225/06513 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit device comprising:
a first die comprising programmable logic, debug and trace circuitry, and first data exchange circuitry, wherein the first data exchange circuitry is connected to the programmable logic and microbumps; and
a second die comprising:
second data exchange circuitry that is connected to the microbumps and exchanges data with the first data exchange circuitry via the microbumps; and
network on chip circuitry connected to the second data exchange circuitry and configurable to provide an interface for the first die to send data to or receive data from systems external to the first die and the second die.