US 12,413,209 B2
Clock signal generator and operating method thereof
Jihyun Park, Suwon-si (KR); Bilal Ahmad Janjua, Suwon-si (KR); Chiweon Yoon, Suwon-si (KR); and Jungyu Lee, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Jan. 18, 2024, as Appl. No. 18/416,527.
Claims priority of application No. 10-2023-0014901 (KR), filed on Feb. 3, 2023.
Prior Publication US 2024/0267034 A1, Aug. 8, 2024
Int. Cl. H03K 3/011 (2006.01); G05F 3/26 (2006.01); G11C 7/04 (2006.01); G11C 16/32 (2006.01); H03L 1/02 (2006.01)
CPC H03K 3/011 (2013.01) [G05F 3/262 (2013.01); G11C 7/04 (2013.01); G11C 16/32 (2013.01); H03L 1/022 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of generating clock signals, the method comprising:
receiving a bandgap reference voltage from a bandgap reference circuit;
generating a first current having a first curvature characteristic based on the bandgap reference voltage;
generating a second current having a second curvature characteristic based on the bandgap reference voltage;
generating a first complementary to absolute temperature (CTAT) current by adding the first current to the second current;
receiving a temperature-variable voltage and a temperature-fixed voltage from a voltage generator;
generating an offset current based on the temperature-variable voltage and the temperature-fixed voltage;
generating a reference current by adding the first CTAT current to the offset current; and
generating the clock signals by alternately discharging a first capacitor and a second capacitor based on the reference current, and charging the first capacitor and the second capacitor based on a power voltage.