US 12,412,860 B2
Package structure
Hsien-Wei Chen, Hsinchu (TW); and Ming-Fa Chen, Taichung (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 26, 2023, as Appl. No. 18/359,024.
Application 18/359,024 is a continuation of application No. 17/325,649, filed on May 20, 2021, granted, now 11,810,883.
Claims priority of provisional application 63/136,744, filed on Jan. 13, 2021.
Prior Publication US 2023/0369273 A1, Nov. 16, 2023
Int. Cl. H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/10 (2006.01)
CPC H01L 24/24 (2013.01) [H01L 23/3135 (2013.01); H01L 23/481 (2013.01); H01L 24/25 (2013.01); H01L 25/0652 (2013.01); H01L 25/0657 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 23/5385 (2013.01); H01L 24/08 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/24011 (2013.01); H01L 2224/2402 (2013.01); H01L 2224/24101 (2013.01); H01L 2224/24175 (2013.01); H01L 2224/25171 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73259 (2013.01); H01L 2224/73267 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of forming a semiconductor structure, the method comprising:
bonding a first semiconductor die to a first surface of a second semiconductor die, wherein the first semiconductor die is electrically connected to the second semiconductor die;
laterally encapsulating the first semiconductor die and the second semiconductor die with an encapsulant, the encapsulant comprising a first encapsulation portion and a second encapsulation portion continuous with the first encapsulation portion, the first encapsulation portion being disposed on the second semiconductor die and laterally encapsulating the first semiconductor die, and the second encapsulation portion laterally encapsulating the first encapsulation portion and the second semiconductor die; and
forming a first redistribution circuit structure on the first semiconductor die and a first surface of the encapsulant, wherein the first redistribution circuit structure is electrically connected to the first semiconductor die.