US 12,412,856 B2
Package structure and method of manufacturing the same
Ting-Chen Tseng, Hsinchu (TW); Hung-Jui Kuo, Hsinchu (TW); Yu-Hsiang Hu, Hsinchu (TW); and Sih-Hao Liao, New Taipei (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (CN)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 25, 2022, as Appl. No. 17/872,000.
Application 17/872,000 is a continuation of application No. 16/718,213, filed on Dec. 18, 2019, granted, now 11,862,594.
Prior Publication US 2022/0359446 A1, Nov. 10, 2022
Int. Cl. H01L 23/495 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/28 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01)
CPC H01L 24/14 (2013.01) [H01L 21/561 (2013.01); H01L 23/28 (2013.01); H01L 23/4952 (2013.01); H01L 23/5226 (2013.01); H01L 23/528 (2013.01); H01L 24/94 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package structure, comprising:
a semiconductor die;
conductive pillars, next to and electrically coupled to the semiconductor die;
an insulating encapsulation, laterally encapsulating the semiconductor die and the conductive pillars, the insulating encapsulation having a first surface and a second surface opposite to the first surface;
a redistribution circuit structure, disposed on the first surface of the insulating encapsulation and electrically coupled to the semiconductor die;
a solder resist layer, disposed on the second surface of the insulating encapsulation, wherein the solder resist layer is a single-layer structure comprising a plurality of openings exposing surfaces of the conductive pillars;
first terminals, disposed on and electrically coupled to the redistribution circuit structure, the redistribution circuit structure being between the first terminals and the insulating encapsulation;
second terminals, disposed on and electrically coupled to the conductive pillars, the solder resist layer being between the second terminals and the insulating encapsulation, wherein in a cross section of the package structure along a stacking direction of the insulating encapsulation and the solder resist layer, maximum lateral widths of the second terminals are less than maximum lateral widths of the plurality of openings, respectively, wherein in the cross section, a maximum lateral width of at least one of the plurality of openings is gradually increased along the stacking direction; and
at least one passive device, connected to the redistribution circuit structure, wherein the first terminals and the at least one passive device are disposed at a side of the redistribution circuit structure.