US 12,412,832 B2
Semiconductor device
Nobuhito Shiraishi, Tokyo (JP); Yasuo Morimoto, Tokyo (JP); and Yoshihiro Funato, Tokyo (JP)
Assigned to RENESAS ELECTRONICS CORPORATION, Tokyo (JP)
Filed by RENESAS ELECTRONICS CORPORATION, Tokyo (JP)
Filed on Feb. 2, 2023, as Appl. No. 18/163,566.
Claims priority of application No. 2022-069987 (JP), filed on Apr. 21, 2022.
Prior Publication US 2023/0343700 A1, Oct. 26, 2023
Int. Cl. H01L 23/532 (2006.01); H01C 7/00 (2006.01); H01L 23/522 (2006.01); H01L 25/065 (2023.01); H10D 1/47 (2025.01); H10D 86/85 (2025.01)
CPC H01L 23/5228 (2013.01) [H01L 23/5329 (2013.01); H01L 25/0655 (2013.01); H01L 2924/142 (2013.01); H01L 2924/14253 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an interlayer dielectric film; and
a plurality of resistive films arranged on the interlayer dielectric film,
wherein each of the plurality of resistive films extends in a first direction along an upper surface of the interlayer dielectric film in plan view,
wherein the plurality of resistive films are arranged spaced apart in a second direction along the upper surface of the interlayer dielectric film and orthogonal to the first direction in plan view,
wherein the plurality of resistive films are divided into a first group, a second group and a third group,
wherein the first group is located between the second group and the third group in the second direction,
wherein a second width variation amount of each of a plurality of second resistive films belonging to the second group and a third width variation amount of each of a plurality of third resistive films belonging to the third group are greater than a first width variation amount of each of a plurality of first resistive films belonging to the first group,
wherein the first width variation amount is a difference between a reference width and a width of each of the plurality of first resistive films,
wherein the second width variation amount is a difference between the reference width and a width of each of the plurality of second resistive films,
wherein the third width variation amount is a difference between the reference width and a width of each of the plurality of third resistive films,
wherein the reference width is a width of one of the plurality of resistive films at the center in the second direction,
wherein the plurality of first resistive films are electrically connected with a first circuit group,
wherein at least part of the plurality of second resistive films and/or at least part of the plurality of third resistive films are electrically connected with a second circuit group different from the first circuit group.