US 12,412,818 B2
Structure of package substrate
Pei-Liang Chiu, Hsinchu (TW)
Assigned to PRINCO CORP., Hsinchu (TW)
Filed by PRINCO CORP., Hsinchu (TW)
Filed on Mar. 1, 2023, as Appl. No. 18/115,865.
Claims priority of application No. 111109272 (TW), filed on Mar. 14, 2022.
Prior Publication US 2023/0317587 A1, Oct. 5, 2023
Int. Cl. H01L 23/49 (2006.01); H01L 23/15 (2006.01); H01L 23/498 (2006.01)
CPC H01L 23/49822 (2013.01) [H01L 23/15 (2013.01); H01L 23/49827 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A structure of a package substrate, comprising:
a first multi-layer substrate comprising a plurality of dielectric layers and a plurality of metal wiring layers and having a first surface and a second surface which are opposite to each other,
wherein the dielectric layers and the metal wiring layers are alternately stacked, the dielectric layers are adhered to each other,
the metal wiring layers are individually embedded in the corresponding dielectric layers, and
a dielectric layer of the plurality of dielectric layers located in the first surface of the multi-layer substrate is used as a solder mask layer which is embedded with at least one pad layer; and
a supporting substrate having a first surface and a second surface which are opposite to each other,
wherein the first surface of the supporting substrate is disposed on the second surface of the first multi-layer substrate and electrically connected to the first multi-layer substrate,
there is no gap between the first surface of the supporting substrate and the second surface of the first multi-layer substrate,
the supporting substrate comprises a plurality of vertical vias, the vertical vias are used for electrically connecting the first surface of the supporting substrate to the second surface of the supporting substrate, and
at least one electrical connection point is disposed on the second surface of the supporting substrate to electrically connect to a circuit board or an electronic component.