US 12,412,801 B2
Packaged semiconductor device
Jens Kowalsky, Storkow (DE)
Assigned to 3-5 Power Electronics GmbH, Dresden (DE)
Filed by 3-5 Power Electronics GmbH, Dresden (DE)
Filed on Apr. 14, 2022, as Appl. No. 17/721,000.
Claims priority of application No. 10 2021 001 968.7 (DE), filed on Apr. 15, 2021.
Prior Publication US 2022/0336315 A1, Oct. 20, 2022
Int. Cl. H01L 23/367 (2006.01); H01L 23/31 (2006.01); H01L 23/46 (2006.01); H01L 23/49 (2006.01)
CPC H01L 23/367 (2013.01) [H01L 23/3107 (2013.01); H01L 23/46 (2013.01); H01L 23/49 (2013.01)] 18 Claims
OG exemplary drawing
 
18. A packaged semiconductor device comprising:
a heat sink having a top, a bottom, lateral surfaces that connect the top to the bottom, and, extending within the heat sink, a cooling structure with an inlet line and an outlet line for a cooling medium, the heat sink being formed of an electrically conductive material with a first coefficient of thermal expansion at the top and with a second coefficient of thermal expansion at the bottom;
a first die arranged on the top of the heat sink;
an encapsulating material; and
an electrically insulating carrier,
a second die arranged on the bottom of the heat sink, the first and second die being connected to the heat sink in an electrically conductive manner,
wherein the coefficient of thermal expansion of the top and of the bottom of the heat sink differs from the coefficient of thermal expansion of the die arranged thereon by less than 8%,
wherein the heat sink is attached at one of the lateral surfaces to the electrically insulating carrier, and
wherein the heat sink with the first die and second die is surrounded by the encapsulating material.