US 12,412,532 B2
Voltage-input pixel driving circuit for microdisplay panel
Bohua Zhao, Beijing (CN); Ran Huang, Beijing (CN); and Lei Sun, Beijing (CN)
Assigned to BEIJING DIGITAL LIGHT CHIP TECH CO., LTD., Beijing (CN)
Appl. No. 18/871,819
Filed by BEIJING DIGITAL LIGHT CHIP TECH CO., LTD., Beijing (CN)
PCT Filed Feb. 29, 2024, PCT No. PCT/CN2024/079254
§ 371(c)(1), (2) Date Dec. 5, 2024,
PCT Pub. No. WO2024/183607, PCT Pub. Date Sep. 12, 2024.
Claims priority of application No. 202310196354.7 (CN), filed on Mar. 3, 2023.
Prior Publication US 2025/0266000 A1, Aug. 21, 2025
Int. Cl. G09G 3/3258 (2016.01); G09G 3/32 (2016.01)
CPC G09G 3/3258 (2013.01) [G09G 3/32 (2013.01); G09G 2300/043 (2013.01); G09G 2330/021 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A voltage-input pixel driving circuit for a microdisplay panel, comprising: a first transistor M1, a second transistor MR, a driving transistor MD, a coupling capacitor CC, a light-emitting element, and a MUX signal gating unit;
wherein the first transistor M1 comprises a gate connected to a scan signal line SCAN of the microdisplay panel, a source connected to a data signal line DATA of the microdisplay panel, and a drain connected to a source of the second transistor MR; a gate of the second transistor MR is connected to an external bias voltage VBIAS, a drain of the second transistor MR is connected to a gate of the driving transistor MD, a source of the driving transistor MD is connected to one end of the light-emitting element, the other end of the light-emitting element is connected to a common voltage VCOM, and a drain of the driving transistor MD is connected to the MUX signal gating unit;
the MUX signal gating unit outputs a low level signal when the scan signal line SCAN transmits a high level signal, and the MUX signal gating unit outputs a high level signal when the scan signal line SCAN transmits a low level signal; and
the second transistor MR is in a normally-on state under an action of the external bias voltage VBIAS.