US 12,411,797 B2
Interrupt latency and error resilient full-duplex SPI driver
Simon Beaudoin, Beloeil (CA); Yacin Belmihoub-Martel, Montréal (CA); Francois Killeen, Laval (CA); Damien Riegel, Montréal (CA); and Alexandre Autotte Portelance, St. Hubert (CA)
Assigned to Silicon Laboratories Inc., Austin, TX (US)
Filed by Silicon Laboratories Inc., Austin, TX (US)
Filed on Jun. 20, 2023, as Appl. No. 18/211,877.
Prior Publication US 2024/0427726 A1, Dec. 26, 2024
Int. Cl. G06F 13/42 (2006.01); G06F 13/28 (2006.01)
CPC G06F 13/4291 (2013.01) [G06F 13/28 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A method of transmitting a payload from a host to a peripheral device using Serial Peripheral Interface (SPI), the method comprising:
asserting, by the host, a chip select (CS) signal to indicate that a transmission is intended for the peripheral device;
transmitting a header from the host to the peripheral device, wherein the header contains a number of bytes contained in the payload;
ensuring, at the peripheral device, after receipt of a final byte of the header, that an interrupt (IRQ) signal is deasserted, which signals that the peripheral device is not ready to receive the payload;
performing operations at the peripheral device to prepare to receive the payload;
asserting, by the peripheral device, the IRQ signal, after performing the operations, to indicate that the peripheral device is ready to receive the payload; and
transmitting, by the host, the payload after detecting an assertion of the IRQ signal.