US 12,411,779 B2
High bandwidth memory system
Krishna T. Malladi, San Jose, CA (US); Dimin Niu, Sunnyvale, CA (US); and Hongzhong Zheng, Los Gatos, CA (US)
Assigned to SAMSUNG ELECTRONICS CO., LTD., (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Sep. 1, 2022, as Appl. No. 17/901,846.
Application 17/901,846 is a continuation of application No. 16/569,657, filed on Sep. 12, 2019, granted, now 11,436,165.
Claims priority of provisional application 62/841,815, filed on May 1, 2019.
Prior Publication US 2022/0414030 A1, Dec. 29, 2022
Int. Cl. G06F 13/36 (2006.01); G06F 12/06 (2006.01); G06F 13/16 (2006.01)
CPC G06F 13/1642 (2013.01) [G06F 12/0646 (2013.01); G06F 2212/251 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory system, comprising:
a data bus configured to transfer data to a memory;
cache media; and
a controller configured to:
receive a data write request to transfer, using the data bus, the data to the memory;
determine that the data comprises one or more characteristics that allows the data bus to perform a different request than the data write request;
communicate, based on one or more characteristics of the data, first information relating to the determining;
store, based on the determining, to the cache media, second information relating to one or more addresses corresponding to at least a portion of the data; and
generate, based on the determining, an indication that the data bus is available for the different request during a cycle time of the data write request.