US 12,411,633 B2
Memory system for data swap and operating method thereof
Eui-Young Chung, Seoul (KR); Sang Hyup Lee, Gyeongsangbuk-do (KR); Kwangsu Kim, Gyeonggi-do (KR); Jeongbin Kim, Seoul (KR); and Byoung Jin Kim, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Jul. 17, 2020, as Appl. No. 16/932,234.
Claims priority of application No. 10-2019-0091612 (KR), filed on Jul. 29, 2019.
Prior Publication US 2021/0034286 A1, Feb. 4, 2021
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0656 (2013.01) [G06F 3/061 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A memory system comprising:
a first layer including a first bank and a first row buffer configured to temporarily store data corresponding to the first bank;
a second layer including a second bank and a second row buffer configured to temporarily store data corresponding to the second bank;
a single through silicon via (TSV) channel coupled between the first row buffer and the second row buffer;
a swap controller configured to generate a swap control command in response to a request received from an external host and to divide swap data into a plurality of data units having a predetermined size to perform a swap operation between the first layer and the second layer; and
a single swap buffer included only in the first layer among the first layer and the second layer, shared by the first layer and the second layer, and configured to temporarily store second swap data moved from the second layer into the first layer while the single TSV channel is used for transferring first swap data to be moved from the first layer into the second layer,
wherein the swap controller performs the swap operation by:
controlling the first swap data to be moved from the first bank to the first row buffer and controlling the second swap data to be moved from the second bank to the second row buffer corresponding to the second bank;
controlling the second swap data stored in the second row buffer to be moved to the single swap buffer through the single TSV channel;
controlling the first swap data stored in the first row buffer to be moved to the second row buffer through the single TSV channel;
controlling the second swap data stored in the single swap buffer to be moved to the first row buffer; and
controlling the second swap data stored in the first row buffer to be written in the first bank and controlling the first swap data stored in the second row buffer to be written in the second bank.