US 12,411,609 B2
Memory device and its operating method, memory system and operating method thereof
Xingwei Tang, Wuhan (CN); Guangchang Ye, Wuhan (CN); and Lu Guo, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Mar. 5, 2024, as Appl. No. 18/595,879.
Application 18/595,879 is a continuation of application No. PCT/CN2023/130024, filed on Nov. 6, 2023.
Prior Publication US 2025/0147667 A1, May 8, 2025
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0613 (2013.01) [G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
an array of memory cells, including a plurality of memory cells, wherein a preset number of the plurality of memory cells form a code word;
a peripheral circuit coupled to the array of memory cells and configured to:
obtain a first result corresponding to at least one of the code words at a target read voltage, wherein the first result includes a number of bits which represents the number of bits in at least one of the code words which are flipped in two results of reading at a first read voltage and a second read voltage, and wherein a difference between the first read voltage and the second read voltage is less than a preset voltage;
adjust the target read voltage in accordance with the first result corresponding to at least one of the code words at the target read voltage;
obtain a first result corresponding to at least one of the code words at the adjusted read voltage; and
determine a valley voltage in accordance with a plurality of the first results, wherein the valley voltage is a read voltage for performing a read operation on at least one of the code words.