US 12,411,602 B2
Memory system
Kohei Oikawa, Kawasaki Kanagawa (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Mar. 3, 2023, as Appl. No. 18/178,472.
Claims priority of application No. 2022-106782 (JP), filed on Jul. 1, 2022.
Prior Publication US 2024/0004549 A1, Jan. 4, 2024
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0608 (2013.01) [G06F 3/0656 (2013.01); G06F 3/0679 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A memory system comprising:
a non-volatile memory;
a buffer memory; and
a controller configured to write data to the non-volatile memory in write units of a predefined size, each write unit including a plurality of data items and log data for the write unit, wherein the controller is further configured to:
temporarily store the data items and the log data of each write unit in the buffer memory prior to writing the write unit to the non-volatile memory, and
in response to a write command, store write data specified in the write command and log information associated with the write data in the buffer memory, calculate a total data size by adding a data size of the write data to a data size of the data items in the write unit temporarily stored in the buffer memory and a total log size by adding a data size of the log information to a data size of the log data in the write unit temporarily stored in the buffer memory, and in response to determining that either the total data size is greater than a first threshold or the total log size is greater than a second threshold, write the write unit temporarily stored in the buffer memory to the non-volatile memory, and
the controller is further configured to predict a logical address of the write data based on a logical address of a most recent data item added to the write unit, and determine the data size of the log information based on whether or not the logical address of the write data matches the predicted logical address.