US 12,082,468 B2
Display apparatus including conductive pattern in substrate and method of manufacturing the same
Kiseong Seo, Yongin-si (KR); Jekil Ryu, Yongin-si (KR); Wonkyu Choe, Yongin-si (KR); Jungho Choi, Yongin-si (KR); Mugyeom Kim, Hwaseong-si (KR); and Changyong Jeong, Yongin-si (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on Sep. 29, 2023, as Appl. No. 18/375,455.
Application 16/783,733 is a division of application No. 15/906,628, filed on Feb. 27, 2018, granted, now 10,580,846, issued on Mar. 3, 2020.
Application 18/375,455 is a continuation of application No. 17/142,220, filed on Jan. 5, 2021, granted, now 11,812,644.
Application 17/142,220 is a continuation of application No. 16/783,733, filed on Feb. 6, 2020, granted, now 10,916,619, issued on Feb. 9, 2021.
Claims priority of application No. 10-2017-0026462 (KR), filed on Feb. 28, 2017.
Prior Publication US 2024/0032363 A1, Jan. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H10K 59/131 (2023.01); H01L 27/12 (2006.01); H10K 50/00 (2023.01); H10K 50/14 (2023.01); H10K 59/12 (2023.01); H10K 71/80 (2023.01); H10K 77/10 (2023.01); H10K 102/00 (2023.01); H10K 50/842 (2023.01)
CPC H10K 59/131 (2023.02) [H01L 27/1214 (2013.01); H10K 50/00 (2023.02); H10K 59/12 (2023.02); H10K 77/111 (2023.02); H01L 2924/12041 (2013.01); H01L 2924/12044 (2013.01); H10K 50/14 (2023.02); H10K 50/8426 (2023.02); H10K 59/1201 (2023.02); H10K 71/80 (2023.02); H10K 2102/311 (2023.02); Y02E 10/549 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A display apparatus comprising:
a conductive pattern comprising a top surface, a bottom surface opposite to the top surface, and a lateral surface connecting the top surface to the bottom surface;
a first adhesion layer on the conductive pattern;
a first substrate on the first adhesion layer;
a driving circuit over the first substrate, the driving circuit comprising at least one transistor;
a light-emitting device configured to be driven by the driving circuit;
a contact hole formed in the first adhesion layer and the first substrate to partially expose the top surface of the conductive pattern;
a conductive line over the first substrate, the conductive line electrically connecting the driving circuit to the conductive pattern through the contact hole;
a second substrate under the first adhesion layer; and
a second adhesion layer between the second substrate and the first adhesion layer,
wherein, in a plan view, at least a portion of the conductive pattern does not overlap the second adhesion layer.