US 12,082,420 B2
Semiconductor device including interlayer insulation structure including metal-organic framework
Won Tae Koo, Icheon-si (KR); Jae Hyun Han, Icheon-si (KR); and Se Ho Lee, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Sep. 10, 2021, as Appl. No. 17/472,365.
Claims priority of application No. 10-2021-0049477 (KR), filed on Apr. 15, 2021.
Prior Publication US 2022/0336497 A1, Oct. 20, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 51/20 (2023.01); H01L 29/06 (2006.01)
CPC H10B 51/20 (2023.02) [H01L 29/0649 (2013.01)] 16 Claims
OG exemplary drawing
 
1. semiconductor device comprising:
a gate structure comprising a gate electrode layer and an interlayer insulation structure which are alternately stacked;
a dielectric structure disposed to contact a sidewall surface of the gate structure; and
a channel layer disposed over a sidewall surface of the dielectric structure,
wherein the interlayer insulation structure comprises a metal-organic framework layer and an inner insulation layer,
wherein the metal-organic frame work layer contacts a surface of the gate electrode layer in a vertical direction, and
wherein the inner insulation layer is spaced apart from the gate electrode layer and fills entire spaces between the metal-organic frame work layer in the vertical direction,
wherein the inner insulation layer comprises at least one of oxide, nitride, and oxynitride.