CPC H10B 51/20 (2023.02) [H01L 29/0649 (2013.01)] | 16 Claims |
1. semiconductor device comprising:
a gate structure comprising a gate electrode layer and an interlayer insulation structure which are alternately stacked;
a dielectric structure disposed to contact a sidewall surface of the gate structure; and
a channel layer disposed over a sidewall surface of the dielectric structure,
wherein the interlayer insulation structure comprises a metal-organic framework layer and an inner insulation layer,
wherein the metal-organic frame work layer contacts a surface of the gate electrode layer in a vertical direction, and
wherein the inner insulation layer is spaced apart from the gate electrode layer and fills entire spaces between the metal-organic frame work layer in the vertical direction,
wherein the inner insulation layer comprises at least one of oxide, nitride, and oxynitride.
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