US 12,082,340 B2
Semiconductor device and memory system
Yuta Tsubouchi, Tokyo (JP)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by KIOXIA CORPORATION, Tokyo (JP)
Filed on Mar. 3, 2022, as Appl. No. 17/685,853.
Claims priority of application No. 2021-154443 (JP), filed on Sep. 22, 2021.
Prior Publication US 2023/0090795 A1, Mar. 23, 2023
Int. Cl. H05K 1/18 (2006.01); H01L 25/065 (2023.01)
CPC H05K 1/181 (2013.01) [H01L 25/0652 (2013.01); H01L 25/0655 (2013.01); H05K 2201/09418 (2013.01); H05K 2201/09427 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10522 (2013.01); H05K 2201/10545 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory system, comprising:
a printed circuit board;
a plurality of semiconductor devices mounted on the printed circuit board, each semiconductor device comprising a substrate and including:
a plurality of receiving terminals on a surface of the substrate; and
a plurality of transmitting terminals on the surface of the substrate,
the plurality of transmitting terminals being symmetrically positioned on the surface of the substrate with respect to the plurality of receiving terminals with at least a 90 degree rotation about a rotation center position, an ordering of the plurality of transmitting terminals along the surface of the substrate from the rotation center position matching an ordering of the plurality of receiving terminals along the surface of the substrate from the rotation center position; and
a plurality of memory devices, each memory device being connected to one of the semiconductor devices, wherein
the plurality of semiconductor devices are disposed on the printed circuit board so that the respective plurality of receiving terminals of each of the semiconductor devices are opposed to the plurality of transmitting terminals of another one of the semiconductor devices and each of the semiconductor devices are connected to each of the other semiconductor devices on the printed circuit board in a ring daisy chain.