US 12,082,160 B2
V2X frequency and time resource indication signaling
Chunhai Yao, Beijing (CN); Chunxuan Ye, San Diego, CA (US); Dawei Zhang, Saratoga, CA (US); Wei Zeng, Saratoga, CA (US); Yushu Zhang, Beijing (CN); Hong He, San Jose, CA (US); Haitong Sun, Cupertino, CA (US); Weidong Yang, San Diego, CA (US); Oghenekome Oteri, San Diego, CA (US); Yuchul Kim, San Jose, CA (US); Yang Tang, San Jose, CA (US); and Jie Cui, San Jose, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Aug. 25, 2022, as Appl. No. 17/895,362.
Application 17/895,362 is a continuation of application No. 17/267,204, granted, now 11,950,208, previously published as PCT/CN2020/074918, filed on Feb. 12, 2020.
Prior Publication US 2023/0037889 A1, Feb. 9, 2023
Int. Cl. H04W 72/02 (2009.01); H04L 1/08 (2006.01); H04W 72/0453 (2023.01); H04W 72/20 (2023.01)
CPC H04W 72/02 (2013.01) [H04L 1/08 (2013.01); H04W 72/0453 (2013.01); H04W 72/20 (2023.01)] 12 Claims
OG exemplary drawing
 
1. A user equipment (UE), comprising a memory and one or more processors configured to, when executing instructions stored in the memory, cause the UE to:
generate sidelink control information (SCI) stage 2 for transmitting a transport block (TB) to a second UE;
determine a SCI stage 2 scrambling initialization value (Cinit) based on at least a portion of a physical sidelink control channel (PSCCH) cyclic redundancy check (CRC) code and a resource pool constant NCONST RP of A bits, wherein NCONST RP is configured for a resource pool allocated for sidelink communication by the UE and A is an integer between 0 and 31;
generate a scrambling sequence based on the SCI stage 2 Cinit;
transmit the SCI stage 2 to the second UE based on the scrambling sequence.