US 12,082,043 B2
Parallel channel listening device and method
Chen Kojokaro, Yokneam Illit (IL); Minyoung Park, San Ramon, CA (US); Ehud Reshef, Kiryat Tivon (IL); Danny Alexander, Neve Efraim Monosson (IL); Nir Yizhak Balaban, Kfar Netter (IL); and Ofir Klein, Tel Aviv (IL)
Assigned to INTEL CORPORATION, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 25, 2020, as Appl. No. 17/032,030.
Prior Publication US 2022/0104070 A1, Mar. 31, 2022
Int. Cl. H04W 28/06 (2009.01); H04L 69/22 (2022.01); H04W 74/0816 (2024.01)
CPC H04W 28/065 (2013.01) [H04L 69/22 (2013.01); H04W 74/0816 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A wireless communication device comprising:
one or more processors configured to implement a physical layer circuitry, configured to decode a received wireless signal and to output corresponding wireless signal data as one or more data packets, the wireless signal data representing the received wireless signal; and
a medium access control layer circuitry, configured to operate according to at least an inactive mode or an active mode, wherein the inactive mode is a standby mode or a sleep mode, and wherein operating according to the active mode comprises receiving the wireless signal data from the physical layer circuitry and processing the wireless signal data according to one or more predefined medium access control layer routines;
wherein the physical layer circuitry is configured to determine one or more packet header parameters of the one or more data packets; and
if any of the one or more packet header parameters equals any of one or more predetermined values, instruct the medium access control layer circuitry to switch from the inactive mode to the active mode; and
wherein, if none of the one or more packet header parameters match any of the one or more predetermined values, the physical layer circuitry is configured not to instruct the medium access control layer circuitry to switch from the inactive mode to the active mode, and to permit the medium access control layer circuitry to remain in the inactive mode.