US 12,081,270 B2
Device and method for decoding and equalizing
Jie Chen, Wuhan (CN); Starovoit Ivan, Moscow (RU); Plotnikov Pavel, Moscow (RU); and Hongchen Yu, Beijing (CN)
Assigned to Huawei Technologies Co., Ltd, Shenzhen (CN)
Filed by HUAWEI TECHNOLOGIES CO., LTD., Shenzhen (CN)
Filed on Nov. 4, 2022, as Appl. No. 17/981,223.
Application 17/981,223 is a continuation of application No. PCT/CN2020/088634, filed on May 6, 2020.
Prior Publication US 2023/0072299 A1, Mar. 9, 2023
Int. Cl. H04B 10/61 (2013.01); H04B 10/2507 (2013.01); H04B 10/54 (2013.01); H04B 10/69 (2013.01)
CPC H04B 10/541 (2013.01) [H04B 10/2507 (2013.01); H04B 10/616 (2013.01); H04B 10/6163 (2013.01); H04B 10/6971 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device for processing an optical signal, the device comprising:
a processor; and
a memory coupled to the processor and having processor-readable instructions stored thereon, which are executed by the processor and cause the processor to:
generate a first signal by equalizing the optical signal using a first digital back propagation (DBP) algorithm;
generate a first sequence of log-likelihood ratios (LLRs) by demapping and deinterleaving the first signal;
generate a first sequence of bits by iteratively decoding the first sequence of LLRs for a first number of iterations;
generate a sequence of quadrature amplitude modulation (QAM) symbols by mapping and interleaving the first sequence of bits;
generate a second signal by equalizing the first signal based on the sequence of QAM symbols using a second DBP algorithm;
generate a second sequence of LLRs by demapping and deinterleaving the second signal; and
generate a second sequence of bits by iteratively decoding the second sequence of LLRs for a second number of iterations.