CPC H03M 13/1111 (2013.01) [H03M 13/43 (2013.01); H03M 13/611 (2013.01)] | 20 Claims |
1. A method, comprising:
receiving, from a memory device, a first signal indicative of data;
receiving, from the memory device, a second signal comprising a first bit with a first signal level, the first bit indicative of whether the memory device detected a first error associated with the data;
performing, at a host device, a procedure for error control on the data based at least in part on a plurality of bits supporting error control for the data, the procedure for error control comprising outputting a third signal comprising a second bit with a second signal level, the second bit indicative of whether the host device detected a second error associated with the data; and
performing an operation for correcting the data based at least in part on the procedure for error control and comparing the first bit with the second bit.
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