US 12,081,205 B2
Pull up and pulldown stabiliser circuits and methods for gate drivers
Pascal Kamel Abouda, Saint Lys (FR); Badr Guendouz, Colomiers (FR); and Nicolas Roger Michel Claude Baptistat, Toulouse (FR)
Assigned to NXP USA, INC., Austin, TX (US)
Filed by NXP USA, INC., Austin, TX (US)
Filed on Mar. 8, 2023, as Appl. No. 18/180,450.
Claims priority of application No. 22305308 (EP), filed on Mar. 16, 2022.
Prior Publication US 2023/0299765 A1, Sep. 21, 2023
Int. Cl. H03K 17/16 (2006.01)
CPC H03K 17/162 (2013.01) 18 Claims
OG exemplary drawing
 
1. A stabilizer circuit, for stabilizing a voltage at a gate driver terminal of a gate-driver for a driven transistor to a one of a high voltage and a low voltage, the stabilizer circuit comprising:
a first transistor and a second transistor having respective first and second main terminals and connected in series between the gate voltage terminal and a first reference voltage terminal; and
a low-pass filter connected between a control terminal of the first transistor and the gate driver terminal;
wherein the first transistor is configured to have a threshold voltage which is less than a threshold voltage of the driven transistor; and
the second transistor has a control terminal which is configured to be connected to a voltage which is an oppositive of the voltage at the gate driver terminal.