CPC H01L 29/78618 (2013.01) [H01L 21/02252 (2013.01); H01L 21/0259 (2013.01); H01L 29/0665 (2013.01); H01L 29/401 (2013.01); H01L 29/41733 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] | 20 Claims |
1. A method, comprising:
providing a semiconductor structure including a fin protruding from a substrate, wherein the fin includes first semiconductor layers and second semiconductor layers alternatingly disposed in a vertical direction, and wherein the first and second semiconductor layers include different material compositions;
recessing the fin, thereby forming a source/drain (S/D) recess;
forming an S/D feature in the S/D recess;
trimming the S/D feature;
depositing a dielectric layer to cover the S/D feature;
forming a contact hole in the dielectric layer, thereby exposing a portion of the S/D feature; and
depositing a metal material in the contact hole, thereby forming a metal contact landing on the S/D feature.
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