US 12,080,800 B2
Semiconductor devices with modified source/drain feature and methods thereof
Wei-Jen Lai, Keelung (TW); Wei-Yang Lee, Taipei (TW); De-Fang Chen, Hsinchu (TW); and Ting-Wen Shih, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu (TW)
Filed on Sep. 1, 2021, as Appl. No. 17/464,500.
Claims priority of provisional application 63/157,255, filed on Mar. 5, 2021.
Prior Publication US 2022/0285561 A1, Sep. 8, 2022
Int. Cl. H01L 29/00 (2006.01); H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/78618 (2013.01) [H01L 21/02252 (2013.01); H01L 21/0259 (2013.01); H01L 29/0665 (2013.01); H01L 29/401 (2013.01); H01L 29/41733 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66553 (2013.01); H01L 29/66742 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
providing a semiconductor structure including a fin protruding from a substrate, wherein the fin includes first semiconductor layers and second semiconductor layers alternatingly disposed in a vertical direction, and wherein the first and second semiconductor layers include different material compositions;
recessing the fin, thereby forming a source/drain (S/D) recess;
forming an S/D feature in the S/D recess;
trimming the S/D feature;
depositing a dielectric layer to cover the S/D feature;
forming a contact hole in the dielectric layer, thereby exposing a portion of the S/D feature; and
depositing a metal material in the contact hole, thereby forming a metal contact landing on the S/D feature.