US 12,080,797 B2
Multi-bridge channel field effect transistor with recessed source/drain
Dohyun Lee, Seoul (KR); Dongwoo Kim, Suwon-si (KR); Daeyong Kim, Yongin-si (KR); and Rakhwan Kim, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Sep. 7, 2021, as Appl. No. 17/467,656.
Claims priority of application No. 10-2021-0000277 (KR), filed on Jan. 4, 2021.
Prior Publication US 2022/0216339 A1, Jul. 7, 2022
Int. Cl. H01L 29/78 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7851 (2013.01) [H01L 29/0847 (2013.01); H01L 29/1033 (2013.01); H01L 29/41791 (2013.01); H01L 29/66553 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
an active region disposed on a substrate, the active region extending in a first direction;
a plurality of channel layers disposed on the active region, the plurality of channel layers spaced apart from each other along a second direction;
gate electrodes disposed on the substrate, the gate electrodes intersecting the active region and the plurality of channel layers, extending in a third direction, and surrounding the plurality of channel layers;
a source/drain region disposed on the active region on at least one side of the gate electrodes, the source/drain region contacting the plurality of channel layers; and
a contact structure disposed between the gate electrodes, the contact structure extending in the second direction and contacting the source/drain region,
wherein the source/drain region includes a recess region recessed from an upper portion of the source/drain region,
wherein the contact structure includes a metal-semiconductor layer disposed to fill the recess region and a contact plug disposed on the metal-semiconductor layer,
wherein a lower surface of the metal-semiconductor layer is located at a level lower than an uppermost channel layer among the plurality of channel layers, and
wherein an uppermost surface of the metal-semiconductor layer is located at a level lower than the contact plug.