| CPC H01L 29/7851 (2013.01) [H01L 23/5283 (2013.01); H01L 29/0847 (2013.01)] | 20 Claims |
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1. A semiconductor device comprising:
an active pattern extending in a first direction on a substrate;
gate structures extending in a second direction on the active pattern, wherein each gate structure includes a gate electrode intersecting the active pattern and a gate capping pattern on the gate electrode;
a source/drain pattern disposed on the active pattern between adjacent gate structures;
a lower active contact connected to the source/drain pattern;
an etching stop film extending along an upper surface of the lower active contact without contacting an upper surface of the gate capping pattern; and
an upper active contact connected to the lower active contact,
wherein a bottom surface of the upper active contact is lower than the upper surface of the gate capping pattern.
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