CPC H01L 29/42328 (2013.01) [G11C 16/16 (2013.01); G11C 16/26 (2013.01); H10B 41/10 (2023.02); H10B 41/35 (2023.02); H10B 41/41 (2023.02); G11C 16/3427 (2013.01)] | 7 Claims |
1. A memory device comprising:
an active control gate extending a first direction; and
a plurality of unit cells configured to share the active control gate, each of the unit cells including a selection gate extending parallel to the active control gate, and a floating gate including a first portion extending parallel to the selection gate between the selection gate and the active control gate and a second portion extending from the first portion and overlapping the active control gate,
wherein areas of the second portions of the floating gates are substantially the same, and the second portions of the floating gates are arranged in parallel with equal spacing.
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