US 12,080,769 B2
Contact structure with silicide and method for forming the same
Kai-Hsuan Lee, Hsinchu (TW); Shih-Che Lin, Hsinchu (TW); Po-Yu Huang, Hsinchu (TW); Shih-Chieh Wu, Hsinchu (TW); I-Wen Wu, Hsinchu (TW); Chen-Ming Lee, Taoyuan (TW); Fu-Kai Yang, Hsinchu (TW); and Mei-Yun Wang, Hsin-Chu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 15, 2022, as Appl. No. 17/672,098.
Prior Publication US 2023/0261068 A1, Aug. 17, 2023
Int. Cl. H01L 29/417 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/41791 (2013.01) [H01L 27/0886 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device structure, comprising:
a source/drain region formed in a semiconductor substrate;
a source/drain contact structure formed over the source/drain region;
a gate electrode layer formed over the semiconductor substrate and adjacent to the source/drain contact structure;
a first spacer and a second spacer both between the gate electrode layer and the source/drain contact structure, in isolation from one another and laterally and successively arranged from a sidewall of the gate electrode layer to a sidewall of the source/drain contact structure, wherein a sidewall of the first spacer is substantially aligned to a first side edge of the source/drain region extending in a longitudinal direction of the gate electrode layer; and
a silicide region formed in the source/drain region, wherein a top width of the silicide region is greater than a bottom width of the source/drain contact structure and less than a top width of the source/drain region.