US 12,080,768 B2
Transistor, semiconductor structure, and manufacturing method thereof
Ming-Yen Chuang, Hsinchu (TW); Chang-Lin Yang, Taoyuan (TW); Katherine H. Chiang, New Taipei (TW); and Mauricio Manfrini, Hsinchu County (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Aug. 19, 2021, as Appl. No. 17/407,097.
Prior Publication US 2023/0058626 A1, Feb. 23, 2023
Int. Cl. H01L 29/417 (2006.01); H01L 27/06 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/41775 (2013.01) [H01L 27/0617 (2013.01); H01L 29/401 (2013.01); H01L 29/41733 (2013.01); H01L 29/41741 (2013.01); H01L 29/42384 (2013.01); H01L 29/45 (2013.01); H01L 29/66742 (2013.01); H01L 29/78642 (2013.01); H01L 29/7869 (2013.01); H01L 2029/42388 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A transistor, comprising:
a gate electrode;
a gate dielectric layer covering the gate electrode;
an active layer covering the gate dielectric layer and comprising a first metal oxide material; and
source/drain electrodes disposed on the active layer and made of a second metal oxide material with an electron concentration of at least about 1018 cm−3, wherein the source/drain electrodes comprise a top electrode and a bottom electrode, an entire top surface of the top electrode of the source/drain electrodes is coplanar with an entire top surface of the active layer, an entire top surface of the gate dielectric layer and an entire top surface of the gate electrode.