US 12,080,766 B2
Epitaxial backside contact
Chia-Hung Chu, Taipei (TW); Tsungyu Hung, Hsinchu (TW); Hsu-Kai Chang, Hsinchu (TW); Ding-Kang Shih, New Taipei (TW); Keng-Chu Lin, Hsinchu (TW); Pang-Yen Tsai, Jhu-bei (TW); Sung-Li Wang, Hsinchu County (TW); and Shuen-Shin Liang, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD, Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Apr. 10, 2023, as Appl. No. 18/297,854.
Application 18/297,854 is a continuation of application No. 17/140,663, filed on Jan. 4, 2021, granted, now 11,626,494.
Claims priority of provisional application 63/040,092, filed on Jun. 17, 2020.
Prior Publication US 2023/0246082 A1, Aug. 3, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/417 (2006.01); H01L 21/02 (2006.01); H01L 21/285 (2006.01); H01L 23/528 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/45 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/41733 (2013.01) [H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/28518 (2013.01); H01L 23/5286 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/45 (2013.01); H01L 29/66742 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a source feature;
a vertical stack of nanostructures in contact with a sidewall of the source feature;
a gate structure wrapped around each of the vertical stack of nanostructures;
a semiconductor layer over the gate structure;
a dielectric layer over the semiconductor layer;
a doped semiconductor feature extending through the semiconductor layer and the dielectric layer to be in contact with the source feature; and
a metal contact plug over the doped semiconductor feature,
wherein the doped semiconductor feature partially extends into the metal contact plug.