US 12,080,764 B2
Semiconductor structure
Chih-Yen Chen, Hsinchu (TW); Franky Juanda Lumbantoruan, Taoyuan (TW); Tuan-Wei Wang, New Taipei (TW); and Juin-Yang Chen, New Taipei (TW)
Assigned to VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION, Hsinchu (TW)
Filed by Vanguard International Semiconductor Corporation, Hsinchu (TW)
Filed on Dec. 9, 2021, as Appl. No. 17/546,254.
Prior Publication US 2023/0187505 A1, Jun. 15, 2023
Int. Cl. H01L 29/15 (2006.01); H01L 29/205 (2006.01); H01L 29/267 (2006.01); H01L 29/778 (2006.01); H01L 29/20 (2006.01)
CPC H01L 29/205 (2013.01) [H01L 29/267 (2013.01); H01L 29/15 (2013.01); H01L 29/2003 (2013.01); H01L 29/7786 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
a buffer layer on the substrate;
a channel layer on the buffer layer;
a barrier layer on the channel layer;
a doped compound semiconductor layer on the barrier layer; and
a composite blocking layer on the doped compound semiconductor layer,
wherein the composite blocking layer and the barrier layer comprise a same group III element, and an atomic percentage of the same group III element in the composite blocking layer increases with distance away from the doped compound semiconductor layer.