CPC H01L 29/0696 (2013.01) [H01L 29/045 (2013.01); H01L 29/086 (2013.01); H01L 29/1608 (2013.01); H01L 29/7805 (2013.01); H01L 29/7806 (2013.01); H01L 29/7813 (2013.01)] | 18 Claims |
1. An SiC semiconductor device comprising:
a SiC semiconductor layer having a first main surface on one side and a second main surface on the other side;
an active region having an active surface as a part of the first main surface;
an outer region defined outside the active region and including an outer surface as a part of the first main surface;
a trench gate structure disposed in the active surface in the active region;
a plurality of field regions disposed in a surface layer portion of the outer surface in the outer region at intervals toward a periphery of the outer region side from the active region side, wherein intervals among the plurality of field regions are increased toward the periphery of the outer region from the active region; and
an interlayer insulating layer disposed on the first main surface extending towards the trench gate structure in the active region and covering the field regions in the outer region, wherein
the interlayer insulating laver has an oblique portion facing an active side wall on the first main surface and a first flat portion facing the field regions,
the oblique portion has a thickness approximately equal to a thickness of the first flat portion,
the interlayer insulating layer includes a second flat portion extending from the oblique portion towards the trench gate structure, and
the interlayer layer extends continuously from the oblique portion to the second flat portion.
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