US 12,080,756 B2
Altering breakdown voltages in gate devices and related methods and systems
Gaurav Musalgaonkar, Telangana (IN); Naveen Kaushik, Boise, ID (US); Sonam Jain, Telangana (IN); Haitao Liu, Boise, ID (US); and Chittoor Ranganathan Parthasarathy, Telangana (IN)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jan. 13, 2022, as Appl. No. 17/647,912.
Prior Publication US 2023/0223434 A1, Jul. 13, 2023
Int. Cl. H01L 29/06 (2006.01); H01L 27/088 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01)
CPC H01L 29/0626 (2013.01) [H01L 27/088 (2013.01); H01L 29/66681 (2013.01); H01L 29/7816 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
lightly doped drain (LDD) regions vertically extending into a semiconductor substrate;
a channel region horizontally interposed between the LDD regions;
source/drain (S/D) regions vertically extending into the LDD regions;
breakdown-enhancement implant (BEI) intrusion regions within the LDD regions and horizontally interposed between the channel region and the S/D regions, the BEI intrusion regions doped with a different chemical species than the LDD regions and having upper boundaries vertically underlying upper boundaries of the LDD regions; and
a gate structure vertically overlying the channel region and horizontally interposed between the BEI intrusion regions.