US 12,080,735 B2
Solid-state imaging element, solid-state imaging device, and electronic equipment
Takanori Yagami, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/291,206
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Nov. 6, 2019, PCT No. PCT/JP2019/043566
§ 371(c)(1), (2) Date May 4, 2021,
PCT Pub. No. WO2020/100697, PCT Pub. Date May 22, 2020.
Claims priority of application No. 2018-213051 (JP), filed on Nov. 13, 2018.
Prior Publication US 2021/0358982 A1, Nov. 18, 2021
Int. Cl. H01L 27/146 (2006.01); H04N 25/70 (2023.01); A61B 1/05 (2006.01); B60R 11/04 (2006.01)
CPC H01L 27/14612 (2013.01) [H01L 27/14643 (2013.01); H04N 25/70 (2023.01); A61B 1/05 (2013.01); B60R 11/04 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A solid-state imaging element comprising:
a first pixel circuit and a second pixel circuit, each including a first transistor, a second transistor and a photoelectric converter that performs photoelectric conversion on received light to generate a pixel signal, the first transistor being configured to amplify the pixel signal generated by the photoelectric converter the second transistor being configured to receive a reference signal from a reference signal generator, and
a third transistor that is shared by the first pixel circuit and the second pixel circuit, the third transistor being configured to respectively output bias current to the first transistor and the second transistor of the first and second pixel circuits.