CPC H01L 27/1229 (2013.01) [G09G 3/20 (2013.01); G11C 19/28 (2013.01); H01L 27/1225 (2013.01); H01L 27/1251 (2013.01); H01L 29/045 (2013.01); H01L 29/1033 (2013.01); H01L 29/24 (2013.01); H01L 29/247 (2013.01); H01L 29/41733 (2013.01); H01L 29/42372 (2013.01); H01L 29/45 (2013.01); H01L 29/78648 (2013.01); H01L 29/7869 (2013.01); H01L 29/78693 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0275 (2013.01); G09G 2310/0286 (2013.01); H01L 27/12 (2013.01); H01L 27/1214 (2013.01); H01L 29/4908 (2013.01); H01L 29/78609 (2013.01); H10K 59/1213 (2023.02)] | 8 Claims |
1. A display device comprising:
a pixel portion over a substrate; and
a driver circuit portion over the substrate,
wherein the pixel portion comprises a first transistor and a light-emitting element electrically connected to the first transistor,
wherein the first transistor comprises:
a first gate electrode layer over the substrate;
a first gate insulating layer over the first gate electrode layer;
a first oxide semiconductor layer in which a channel is formed over the first gate insulating layer;
a first source electrode layer comprising a region in contact with the first oxide semiconductor layer;
a first drain electrode layer comprising a region in contact with the first oxide semiconductor layer;
a second gate insulating layer over the first oxide semiconductor layer; and
a second gate electrode layer over the second gate insulating layer,
wherein the first oxide semiconductor layer comprises In, Ga, and Zn, and
wherein the first oxide semiconductor layer comprises a region which has been deposited using a target with a composition ratio of In:Ga:Zn=1:1:1.
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