US 12,080,692 B2
Semiconductor device and method for manufacturing semiconductor device
Keisuke Eguchi, Tokyo (JP); and Hiroyuki Masumoto, Tokyo (JP)
Assigned to Mitsubishi Electric Corporation, Tokyo (JP)
Filed by Mitsubishi Electric Corporation, Tokyo (JP)
Filed on Jan. 19, 2022, as Appl. No. 17/578,799.
Claims priority of application No. 2021-070300 (JP), filed on Apr. 19, 2021.
Prior Publication US 2022/0336429 A1, Oct. 20, 2022
Int. Cl. H01L 25/16 (2023.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/373 (2006.01)
CPC H01L 25/16 (2013.01) [H01L 21/4807 (2013.01); H01L 23/3735 (2013.01); H01L 24/29 (2013.01); H01L 24/30 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/29147 (2013.01); H01L 2224/3003 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/1203 (2013.01); H01L 2924/1205 (2013.01); H01L 2924/13055 (2013.01); H01L 2924/1426 (2013.01); H01L 2924/15787 (2013.01); H01L 2924/1579 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a metal sheet;
an insulating pattern provided on the metal sheet;
a circuit pattern provided on the insulating pattern;
a first power semiconductor chip mounted on the circuit pattern;
a control semiconductor chip that is mounted on the circuit pattern and controls the first power semiconductor chip; and
a second power semiconductor chip mounted on the circuit pattern,
wherein the first power semiconductor chip is bonded to the circuit pattern with a first die bonding material comprised of copper,
the control semiconductor chip is bonded to the circuit pattern with a second die bonding material,
the second power semiconductor chip is bonded to the circuit pattern with the first die bonding material, and
the first power semiconductor chip and the second power semiconductor chip are configured to have different phases.