CPC H01L 24/08 (2013.01) [H01L 24/06 (2013.01); H01L 25/0657 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/09515 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06562 (2013.01)] | 20 Claims |
1. A semiconductor storage device comprising:
a first chip including a semiconductor substrate and a plurality of transistors, the first chip having a plurality of first bonding electrodes on a first surface; and
a second chip including a memory cell array, the second chip having a plurality of second bonding electrodes on a second surface, the first surface being bonded to the second surface and the first bonding electrodes being electrically connected to the second bonding electrodes, wherein
one of the first and second chips has a first bonding pad electrode connectable to a bonding wire for data input/output,
a first one of the first bonding electrodes is electrically connected to the first bonding pad electrode, and
the first chip has, on the first surface;
a first insulating layer provided around outer side surfaces of the first one of the first bonding electrodes; and
a second insulating layer that is farther from the first one of the first bonding electrodes than the first insulating layer, provided around outer side surfaces of the first insulating layer, and formed of a material different from that of the first insulating layer.
|