US 12,080,646 B2
Semiconductor structures and methods of forming the same
Lin-Yu Huang, Hsinchu (TW); Li-Zhen Yu, New Taipei (TW); Cheng-Chi Chuang, New Taipei (TW); Kuan-Lun Cheng, Hsin-Chu (TW); and Chih-Hao Wang, Hsinchu County (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Aug. 8, 2023, as Appl. No. 18/446,113.
Application 18/446,113 is a division of application No. 17/337,962, filed on Jun. 3, 2021, granted, now 11,862,559.
Claims priority of provisional application 63/059,430, filed on Jul. 31, 2020.
Prior Publication US 2023/0387010 A1, Nov. 30, 2023
Int. Cl. H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01)
CPC H01L 23/5283 (2013.01) [H01L 21/76883 (2013.01); H01L 21/76892 (2013.01); H01L 29/401 (2013.01); H01L 29/41775 (2013.01); H01L 21/76885 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
receiving a semiconductor substrate, wherein a first dielectric layer is formed over the semiconductor substrate;
forming a trench in the first dielectric layer;
filling the trench to form a conductive layer in the first dielectric layer;
segmenting the conductive layer to form a first conductive feature and a second conductive feature separated from each other by a recess; and
filling the recess with a second dielectric layer, such that one or both of the conductive features are end-capped by a portion of the first dielectric layer and a portion of the second dielectric layer.