CPC H01L 23/528 (2013.01) [H01L 21/0337 (2013.01); H01L 21/31116 (2013.01); H01L 21/32139 (2013.01)] | 18 Claims |
1. A method for fabricating a semiconductor device, comprising:
providing a substrate comprising a dense pattern area and a loose pattern area, and sequentially forming a conductive stack and a first hard mask layer on the dense pattern area and the loose pattern area;
patterning the first hard mask layer to form a plurality of dense patterning layers above the dense pattern area;
forming a second hard mask layer covering the first hard mask layer and the plurality of dense patterning layers;
patterning the second hard mask layer to form a plurality of loose capping layers above the loose pattern area;
patterning the first hard mask layer above the loose pattern area using the plurality of loose capping layers as masks to form a plurality of loose patterning layers above the loose pattern area, and removing the second hard mask layer and the plurality of loose capping layers; and
patterning the conductive stack using the plurality of dense patterning layers and the plurality of loose patterning layers as masks to form a plurality of dense conductive layers above the dense pattern area and a plurality of loose conductive layers above the loose pattern area;
wherein a distance between an adjacent pair of the plurality of dense conductive layers is less than a distance between an adjacent pair of the plurality of loose conductive layers.
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