CPC H01L 23/5256 (2013.01) [G11C 17/16 (2013.01); H01L 23/481 (2013.01); H10B 20/20 (2023.02); G11C 29/027 (2013.01)] | 20 Claims |
1. An integrated circuit comprising:
a substrate;
a semiconductor structure having active regions therein on the substrate, wherein the semiconductor structure extends in a first direction within an active zone;
a transistor formed with the active regions in the semiconductor structure;
a front-side horizontal conducting line extending in the first direction in a first metal layer, wherein the first metal layer is above the semiconductor structure, and wherein the front-side horizontal conducting line is directly connected to a first terminal of the transistor through a front-side terminal via-connector;
a front-side vertical conducting line extending in a second direction in a second metal layer, the second direction being perpendicular to the first direction, wherein the second metal layer is above the first metal layer, and wherein the front-side vertical conducting line is directly connected to the front-side horizontal conducting line through a front-side metal-to-metal via-connector;
a front-side fuse element having a first fuse terminal conductively connected to the front-side vertical conducting line;
a backside conducting line directly connected to a second terminal of the transistor through a backside terminal via-connector, and wherein the backside conducting line and the front-side fuse element are at opposite sides of the substrate; and
a word connection line extending in the first direction, wherein the word connection line is directly connected to a gate terminal of the transistor through a gate via-connector.
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