US 12,080,620 B2
Additively manufactured structures for heat dissipation from integrated circuit devices
Feras Eid, Chandler, AZ (US); Xavier Brun, Hillsboro, OR (US); Paul Diglio, Gaston, OR (US); Joe Walczyk, Tigard, OR (US); and Sergio Antonio Chan Arguedas, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 25, 2020, as Appl. No. 16/912,432.
Prior Publication US 2021/0407884 A1, Dec. 30, 2021
Int. Cl. H01L 23/373 (2006.01); B33Y 70/00 (2020.01); B33Y 80/00 (2015.01)
CPC H01L 23/3735 (2013.01) [B33Y 70/00 (2014.12); B33Y 80/00 (2014.12)] 21 Claims
OG exemplary drawing
 
1. An integrated circuit assembly, comprising:
an integrated circuit device having a backside surface;
a material stack on the backside surface, wherein the material stack comprises:
a first layer comprising silicon and nitrogen, the first layer in direct contact with the backside surface of the integrated circuit device;
a second layer in direct contact with the first layer, wherein the second layer comprises a first metal;
a third layer over the second layer, wherein the third layer comprises at least one of copper, silver, aluminum, diamond, silicon carbide, boron nitride, or aluminum nitride, and wherein the third layer has thickness of at least 50 μm and a thermal conductivity greater than 150 W/m*K; and
a fourth layer in direct contact with the third layer, wherein the fourth layer comprises a second metal; and
a heat dissipation device over the material stack, wherein the heat dissipation device extends beyond an edge of the backside surface and beyond an edge of the material stack; and
a thermal interface material between the heat dissipation device and the material stack.