US 12,080,619 B2
Semiconductor package
Sang-Uk Kim, Cheonan-si (KR); and Ki Wook Jung, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Apr. 18, 2022, as Appl. No. 17/723,347.
Claims priority of application No. 10-2021-0124558 (KR), filed on Sep. 17, 2021.
Prior Publication US 2023/0090461 A1, Mar. 23, 2023
Int. Cl. H01L 23/373 (2006.01); H01L 23/367 (2006.01); H01L 23/538 (2006.01); H01L 25/18 (2023.01); H01L 49/02 (2006.01)
CPC H01L 23/373 (2013.01) [H01L 23/367 (2013.01); H01L 23/5385 (2013.01); H01L 25/18 (2013.01); H01L 28/40 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package comprising:
a substrate;
a first semiconductor chip disposed on the substrate;
a capacitor disposed on the substrate and spaced apart from the first semiconductor chip in a first direction;
an insulating layer disposed on the substrate and covering the capacitor;
a first heat conductive layer at least partially surrounding side walls of the first semiconductor chip and disposed on the insulating layer, wherein the first heat conductive layer is in contact with the side walls of the first semiconductor chip, and wherein the first heat conductive layer includes a first material that is a conductive material; and
a second heat conductive layer disposed on the first heat conductive layer, wherein the second heat conductive layer is in contact with the first heat conductive layer, wherein the second heat conductive layer includes a second material that is a non-conductive material.