CPC H01L 21/76897 (2013.01) [H01L 21/7685 (2013.01); H01L 21/76864 (2013.01); H01L 21/76885 (2013.01); H01L 23/5226 (2013.01)] | 11 Claims |
1. A method for preparing a semiconductor device structure, comprising:
forming a first dielectric layer over a semiconductor substrate;
forming a first opening penetrating through the first dielectric layer to expose the semiconductor substrate, wherein the first opening is formed from a top surface of the first dielectric layer to a bottom surface thereof;
forming a first conductive plug in the first dielectric layer within the first opening that a top surface of the first conductive plug is coplanar with the top surface of the first dielectric layer;
forming a polysilicon layer covering the top surface of the first dielectric layer and the top surface of the first conductive plug;
transforming a portion of the polysilicon layer into a silicide portion;
forming a second conductive plug directly over the silicide portion; and
forming a second dielectric layer surrounding the second conductive plug;
wherein a width of the second conductive plug is larger than a width of the first conductive plug.
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