US 12,080,595 B2
Method of forming interconnect structure
Keunwook Shin, Yongin-si (KR); Sanghoon Ahn, Seongnam-si (KR); Woojin Lee, Hwaseong-si (KR); Kyung-Eun Byun, Seongnam-si (KR); Junghoo Shin, Seoul (KR); Hyeonjin Shin, Suwon-si (KR); and Yunseong Lee, Osan-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Aug. 25, 2021, as Appl. No. 17/411,467.
Claims priority of application No. 10-2020-0110589 (KR), filed on Aug. 31, 2020.
Prior Publication US 2022/0068704 A1, Mar. 3, 2022
Int. Cl. H01L 21/768 (2006.01); H01L 21/285 (2006.01)
CPC H01L 21/7685 (2013.01) [H01L 21/76843 (2013.01); H01L 21/76849 (2013.01); H01L 21/76855 (2013.01); H01L 21/28562 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A method of forming an interconnect structure, the method comprising:
preparing a substrate including a first metal layer and a first insulating layer;
selectively forming a carbon layer on the first metal layer, the carbon layer having an sp2 bonding structure;
selectively forming a second insulating layer on the first insulating layer, the second insulating layer surrounding the carbon layer;
forming a third insulating layer after partially removing the carbon layer, the third insulating layer covering the second insulating layer, the third insulating layer including an opening over the first metal layer; and
forming a second metal layer on the third insulating layer and electrically connected to the first metal layer.