US 12,080,559 B2
Using a same mask for direct print and self-aligned double patterning of nanosheets
Stuart Sieg, Albany, NY (US); Daniel James Dechene, Albany, NY (US); and Eric Miller, Watervliet, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Dec. 9, 2021, as Appl. No. 17/546,443.
Application 17/546,443 is a division of application No. 16/514,235, filed on Jul. 17, 2019, granted, now 11,257,681.
Prior Publication US 2022/0102153 A1, Mar. 31, 2022
Int. Cl. H01L 21/308 (2006.01); H01L 21/033 (2006.01); H01L 21/8234 (2006.01); H01L 27/092 (2006.01); H01L 29/06 (2006.01); H01L 29/40 (2006.01); H01L 29/66 (2006.01)
CPC H01L 21/3086 (2013.01) [H01L 21/0337 (2013.01); H01L 21/823431 (2013.01); H01L 27/0924 (2013.01); H01L 29/0665 (2013.01); H01L 29/401 (2013.01); H01L 29/66545 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a substrate;
a nanosheet stack disposed over the substrate, the nanosheet stack comprising alternating layers of a sacrificial material and a channel material, the layers of channel material providing nanosheet channels for one or more nanosheet field-effect transistors;
a hard mask stack disposed over the nanosheet stack;
a patterning layer disposed over the hard mask stack; and
a lithographic mask disposed over the patterning layer, the lithographic mask defining (i) one or more first regions having a first width for direct printing of one or more fins of the first width in the nanosheet stack and the substrate and (ii) one or more second regions having a second width for setting the spacing between two or more fins of the second width in the nanosheet stack and the substrate using self-aligned double patterning;
wherein the second width is less than the first width.